Freescale Semiconductor /MKW21Z4 /DCDC /REG1

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Interpret as REG1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0POSLIMIT_BUCK_IN 0POSLIMIT_BOOST_IN 0 (DCDC_LOOPCTRL_CM_HST_THRESH)DCDC_LOOPCTRL_CM_HST_THRESH 0 (DCDC_LOOPCTRL_DF_HST_THRESH)DCDC_LOOPCTRL_DF_HST_THRESH 0 (DCDC_LOOPCTRL_EN_CM_HYST)DCDC_LOOPCTRL_EN_CM_HYST 0 (DCDC_LOOPCTRL_EN_DF_HYST)DCDC_LOOPCTRL_EN_DF_HYST

Description

DCDC REGISTER 1

Fields

POSLIMIT_BUCK_IN

Upper limit duty cycle limit in DC-DC converter

POSLIMIT_BOOST_IN

Upper limit duty cycle limit in DC-DC converter

DCDC_LOOPCTRL_CM_HST_THRESH

Enable hysteresis in switching converter common mode analog comparators

DCDC_LOOPCTRL_DF_HST_THRESH

Enable hysteresis in switching converter differential mode analog comparators

DCDC_LOOPCTRL_EN_CM_HYST

Enable hysteresis in switching converter common mode analog comparators

DCDC_LOOPCTRL_EN_DF_HYST

Enable hysteresis in switching converter differential mode analog comparators

Links

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